Rumors suggest TSMC's 2nm chips will offer significant improvements for phone users.

Instead of a 50% price hike, TSMC's 12-inch wafers for 2nm production might have a smaller increase.
A recent report indicates that TSMC will increase wafer prices, but not as much as previously anticipated. The latest information suggests that 2nm wafers will cost 10% to 20% more, rather than 50%. If these smaller increases are accurate, the price of a 2nm wafer will increase to between $22,000 and $24,000, less than the previously rumored $30,000. This could mean that flagship phone prices in 2026 may not rise as much as initially expected. Prices for other advanced nodes (3nm, 4nm, 5nm, 6nm, and 7nm) will also increase, but only by single-digit percentages depending on the customer.
The original report from EE Times stated that TSMC would raise the price of its 300mm (12-inch) wafers by 50%. If that were true, it would be the first time in a major node transition that the wafer cost per transistor would go up, suggesting a slowdown in the number of transistors being added to chips. However, if the actual price increase for 300mm wafers for 2nm production is significantly less than 50%, as the new report from Taiwan implies, the wafer cost per transistor would not increase.
Investors.com in Taiwan reports that 3nm wafers currently cost $25,000-$27,000, making the increase to $30,000 a 10% to 20% increase rather than the previously estimated 50%. The report also notes that the manufacturing of chips using advanced nodes (3nm, 4nm, 5nm, 6nm, and 7nm) is operating at full capacity, while production facilities for older nodes like 28nm, 40nm, 65nm, and 90nm are underutilized.
According to AMD CEO Lisa Su, chips produced at TSMC's U.S. facilities will cost 5% to 20% more. Other reports indicate that the current production of 4nm chips from TSMC's operational fab in Arizona carries a 30% premium. Because its overseas fabs reduce TSMC's gross margins by 2% to 3%, TSMC believes it must raise prices at its U.S. fabs to maintain a gross profit margin of 53%. This is TSMC's target for this financial metric, allowing the company to generate enough profit to continue investing in its operations.
The 2nm node introduces Gate-All-Around (GAA) transistors. By using horizontal stacks of vertical nanosheets, the gate covers all four sides of the channel, preventing current leaks and improving drive current, which enhances the chip's performance and energy efficiency.
Nvidia, a major TSMC client, supports the foundry's price increase. Jensen Huang, CEO of Nvidia, stated that TSMC delivers great value and that a price increase is reasonable. Huang also referred to TSMC as "one of the greatest companies in the history of humanity."
In the second quarter of 2025, TSMC achieved a record-high market share of 70.3% in the contract foundry industry, significantly ahead of Samsung Foundry's 7.3% share in the same period.
Following 2nm, TSMC plans to mass produce A16 chips, where A stands for angstroms (1 nanometer equals 10 angstroms, making 16 angstroms equivalent to 1.6nm). This node, expected to be in use by 2026, will feature Super Power Rail, TSMC's version of Backside Power Delivery. By placing power lines on the back of the wafer instead of the top, chip speed could improve by 8% to 10%, and power consumption could decrease by 15% to 20% at the same speed.
The A16 node should be followed by high volume manufacturing utilizing A14 (1.4nm) in 2028.
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